1. Field of the Invention
The present invention relates to a semiconductor device on which at least a VCO and a frequency divider for constructing a PLL (phase-locked loop) circuit are fabricated, in which the frequency divider has a control input for simplifying a test, and a method and apparatus for testing the same.
2. Description of the Related Art
FIG. 11(A) is a schematic block diagram of a prior art testing apparatus for a voltage controlled oscillator (VCO) 10. FIG. 11(B) shows a relationship between the control voltage VC and the output frequency of the VCO 10.
The VCO 10 is plugged into a socket of a test board, the control voltage VC is applied to the VCO 10 from a tester 12 and the outgoing clock signal OUT of the VCO 10 is provided to the tester 12. The tester 12 checks on whether or not the frequency of the outgoing clock signal OUT falls within a tolerance when the control voltage VC is each of V1, V2 and V3, and if the frequency of the outgoing clock signal OUT falls within the tolerance for each control voltage VC, the VCO 10 is judged to be acceptable in quality (pass).
However, even if the VCO 10 is judged to be acceptable in quality, when the VCO 10 is employed in a PLL circuit, it has to be checked whether or not the PLL circuit can enter into a locked state in a given time for a reference clock signal, which causes a test cost to be high. Especially, when the VCO 10 is fabricated on one chip together with a frequency divider and others, it has been required to reduce a device test time to save the cost.